Items by "Ravindra, J.V.R."

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Conference or Workshop Item

Ravindra, J.V.R. and Srinivas, M.B. (2010) Generating Reduced Order Models using Subspace Iteration for Linear RLC Circuits in Nanometer Designs. In: 2nd Internationa ICST Conference on Nano-Networks.

This list was generated on Mon May 4 16:45:55 2026 UTC.