A Three Stage Comparator and It’s Modified Version With High Speed and Low Kickback Noise

Babu, Potladurty Suresh and Sobiya, Gundluru Shaik and Reddy, Busi Sai Nadh and Ravindra, Boya and Kishore, Gutha Prasanna and Bhargav, Kарреtа (2025) A Three Stage Comparator and It’s Modified Version With High Speed and Low Kickback Noise. In: Proceedings of the 4th International Conference on Information Technology, Civil Innovation, Science, and Management, ICITSM 2025, 28-29 April 2025, Tiruchengode, Tamil Nadu, India, Part I.

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Abstract

This work presents a comparative analysis of an existing and a proposed comparator circuit. The proposed circuit introduces additional transistors in the input stage, offering potential improvements in common-mode control, threshold adjustment, or gain. The fundamental operation of both circuits rel

Item Type: Conference or Workshop Item (UNSPECIFIED)
Date Deposited: 04 Mar 2026 20:16
Last Modified: 16 Apr 2026 16:01
URI: http://eprints.eai.eu/id/eprint/60007

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