Supporting vertical links for 3D networks-on-chip: toward an automated design and analysis flow

Loi, Igor and Angiolini, Federico and Benini, Luca (2010) Supporting vertical links for 3D networks-on-chip: toward an automated design and analysis flow. In: 2nd Internationa ICST Conference on Nano-Networks.

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Abstract

Three-dimensional (3D) manufacturing technologies are viewed as promising solutions to the bandwidth bottlenecks in VLSI communication. At the architectural level, Networks-on-chip (NoCs) have been proposed to address the complexity of interconnecting an ever-growing number of cores, memories and pe

Item Type: Conference or Workshop Item (UNSPECIFIED)
Date Deposited: 04 Mar 2026 09:19
Last Modified: 18 Apr 2026 06:34
URI: http://eprints.eai.eu/id/eprint/5161

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