Kumar, G. and Chandra, Maturi and Prasanna, K and Mahesh, M (2021) Design and Implementation of AGU based FFT Pipeline Architecture. In: Proceedings of the First International Conference on Computing, Communication and Control System, I3CAC 2021, 7-8 June 2021, Bharath University, Chennai, India.
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Abstract
Present it is most needful task to get various applications with parallel computations by using a Fast Fourier Transform (FFT) and the derived outputs should be in regular format. This can be achieved by using an advanced technique called Multipath delay commutator (MDC) Pipelining FFT processor and
| Item Type: | Conference or Workshop Item (UNSPECIFIED) |
|---|---|
| Date Deposited: | 04 Mar 2026 14:24 |
| Last Modified: | 17 Apr 2026 08:29 |
| URI: | http://eprints.eai.eu/id/eprint/34589 |
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