Design and Analysis of Energy Efficient Domino Logic Architectures with Single Electron Transistors in Pull Down Network and Keeper Topology

AnishFathima, B. and Mahaboob, M. (2020) Design and Analysis of Energy Efficient Domino Logic Architectures with Single Electron Transistors in Pull Down Network and Keeper Topology. EAI Endorsed Transactions on Energy Web.

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Abstract

Nanotechnology and VLSI goes hand in hand. Modernization of electronics and communication systems has demanded for compactness of the devices with low power and high speed. Conventionally CMOS logic is preferred due to its low power and its high speed benefits. Researches demand a new logic style th

Item Type: Article
Date Deposited: 04 Mar 2026 14:20
Last Modified: 11 Apr 2026 19:50
URI: http://eprints.eai.eu/id/eprint/34315

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