Instruction Set Simulator Generation Using HARMLESS, a New Hardware Architecture Description Language

Kassem, Rola and Briday, Mikaël and Béchennec, Jean-Luc and Trinquet, Yvon and Savaton, Guillaume (2010) Instruction Set Simulator Generation Using HARMLESS, a New Hardware Architecture Description Language. In: 2nd International ICST Conference on Simulation Tools and Techniques.

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Abstract

Instruction set simulators are commonly used in embedded system development processes for early functional validation of code and exploration of new instruction set design. Such a simulator can be either hand-written or generated automatically, based on a Hardware Architecture Description Language.

Item Type: Conference or Workshop Item (UNSPECIFIED)
Date Deposited: 04 Mar 2026 08:49
Last Modified: 18 Apr 2026 05:57
URI: http://eprints.eai.eu/id/eprint/1559

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