Béchennec, Jean-Luc and Bullich, Adrien and Briday, Mikaël and Trinquet, Yvon (2014) Improving Processor Hardware Compiled Cycle Accurate Simulation using Program Abstraction. In: Seventh International Conference on Simulation Tools and Techniques.
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Abstract
Verification is an important step in the development of real-time embedded systems. The validation of a real-time system uses a timing accurate simulator and, when the actual binary code is used, a cycle accurate simulator (CAS). However, a CAS is slow especially when the simulated processor is comp
| Item Type: | Conference or Workshop Item (UNSPECIFIED) |
|---|---|
| Date Deposited: | 04 Mar 2026 10:13 |
| Last Modified: | 17 Apr 2026 20:04 |
| URI: | http://eprints.eai.eu/id/eprint/11480 |
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